Precision CMOS Amplifier Using Floating-Gate Transistors for Offset Cancellation

Technology #3492

Disclosed herein is an operational amplifier including: a differential pair of transistors coupled to a pair of input signals; and a pair of floating-gate transistors coupled to the differential pair of transistors, wherein the pair of floating-gate transistors are operable for reducing an offset voltage of the operational amplifier. Also disclosed herein is an operational amplifier including: a differential pair of transistors, including a first and a second transistor; a pair of floating-gate transistors, including a third and fourth transistor; wherein the pair of floating-gate transistors are coupled to one another at a drain node, wherein the differential pair of transistors are coupled to a source node of the pair of floating-gate transistors, and wherein the pair of floating-gate transistors are operable for reducing an offset voltage of the operational amplifier.

Further disclosed herein is an operational amplifier including: a differential pair of transistors, including a first and a second transistor; a pair of floating-gate transistors, including a third and fourth transistor; wherein the differential pair of transistors are coupled to one another at a drain node, wherein the pair of floating-gate transistors are coupled to a source node of the differential pair of transistors, and wherein the pair of floating-gate transistors are operable for reducing an offset voltage of the operational amplifier.